CISC and RISC are the CPU architecture of a Processor. All processors in the whole world are of two architectural CPU either CISC or RISC. Both architectures are very different from each other based on their performance and flexibility. Read the following points to know the world's two CPU architecture.
1. The first outstanding characteristic of a RISC processor is all Instruction Sets are fixed in size (i.e 32bit in ARM). But in CISC processor like 8051, 8086 their Instruction Sets are 1byte, 2 bytes, 3 bytes, or more. But in RISC processor like ARM, all the Instructions are of 4byte. Because all instructions are the same in size i.e 32 bit and that is exactly the same with the size of the data bus, this guarantees every Instruction is required one cycle for fetching. That doesn't true in a CISC processor bigger the instruction more the time it required for fetching. CISC processor needs multiple cycles to fetch the instruction set. Bigger the size of instruction set more cycle required to fetch but in RISC there is no such nonsense all instructions are fetched in one cycle. The advantage of a fixed instruction set is an increase in performance.
2. CISC processor allowed operation on Registers as well as with memory.
Exaple:- ADD A, &R0 ;
Here for add operation, you need to get the value from memory. But RISC doesn't allow any kind of operation on memory. It's only allowed on memory is load and store operation, Everything else is done in the register.
Every instruction will have one execution cycle Because you working on the register. If you working on memory it required one cycle to fetch the data from memory and one more to execute the operation(add or subtract).
Here the pipeline concept is not useful. Because the Pipeline concept says when you execute an instruction it allows you to fetch the next instruction from memory. See RISC processor allow the execution-only on the register and the fetching(Load and Store) done with memory. If the execution is also allowed with memory then it can't fetch the next instruction while executing the current instruction because the buses are busy by execution stage.
3. CISC processor works on both register and memory address. It needs addressing mode to work with register as well as memory for every instruction. So it required more addressing modes. While RISC required less addressing mode for only register operation.
4. Because of CISC works on memory, it doesn't need more register. But to get high-class performance RISC having more Register than CISC processors. Some RISC processor called peak18 having 4096 registers.
5. Again Because CISC works on Memory and register, It required more instruction set. like ADD on the register, ADD on memory, SUB on the register , SUB from memory and etc.. So more and complex is the instruction set more upcodes are there. So more the Upcodes, decode is also complex. So it needs multiple cycles for decoding the instruction opcode. But in RISC there are fewer instruction sets, less and simple upcodes, and also decoding is simple.
6. In one Line:- For Fetch, Decode, and execution the CISC processor needs multiple cycles for each where a RISC processor needs only one cycle for each. Because of all takes one cycle, at a time all three are the start and finish there work like while the first instruction set in executing the second instruction is decoding and the third instruction is fetching. It improves the performance of the processor.
7. Hence the RISC has exelent pipelining and CISC has poor pipling. A 3 stage pipelining in RISC is better than a 6 stage CISC pipelining.
8. CISC processor is flexible but slower, Where RISC is rigidity and this makes the processor faster. So the CISC microprocessor used in computers and the RISC are used in micro-controllers like a remote, mouse or keyboard, it doesn't need flexibility.
