INTRODUCTION TO ARM 7

First of all, I would like to tell you ARM is a modern world microprocessor. All Smart Phones are using ARM Processor, I don't think you need more examples of an ARM processor. 8085, 8086, 8051 are like 40-year-old processor. but we need to learn these processors to get an idea of how the processor works. Here I assume that you have some basic knowledge about any one of the above three (8085,8086,8051) processors.

ARMv7 is the most widely used architecture in mobile devices.

ARMv7, which defines the architecture for the first of the Cortex series of cores, defines three architecture profiles as follows:

A-profile (application profile). 
ARM Cortex-A cores are intended for application use and consist of ARM Cortex-A5, A7, A8, A9, A12, A15, and A17 MPCore. 

These are used in devices such as smartphones, tablet PCs, gaming consoles, and routers.

R-profile (realtime profile). 
ARM Cortex-R cores are intended for robust realtime use and consist of Cortex-R4, R5, and R7. 

These are used in automotive systems, storage devices, medical instruments, digital TVs, Blu-ray players, and others.

M-profile (microcontroller profile). 
ARM Cortex-M cores are intended for microcontroller use and consist of Cortex-M0, M0+, M1, M3, and M4. 


These are used in automotive, gaming consoles, Bluetooth and ZigBee, touchscreen, and power management.

1. The abbreviation of ARM is Advanced RISC Machine. RISC itself has an abbreviation called Reduced Instruction Set Computer. There are two different Architecture of processors called RISC and CISC based on there performance and flexibility. In my next post you could found all the Difference between RISC and CISC architecture.

2. ARM 7 is a Micro-Controller of 32 bit which is 4 times more powerful than 8051 which is 8-bit Micro-Controller. You must be known about the difference between Micro-Controller and Micro-Processor. Here 32 bit and 8 bit means ARM does the 32-bit operation in one cycle and to do the same operation 8051 need 4 cycles. ARM has 32 bit ALU which supports 32 bit arithmetical and logical operation in one cycle.

3. ARM has a 32-bit data bus means it can transfer 32-bit data at one time. It can read and write 32-bit data at a time only when the data are in alignment form.

What is Aligned and Misaligned.?              

Let's say there are four register banks having four 8 Bit register of each. So if the data bus starts reading or writing from the register which is multiple of four i.e 0,4,8, or c then only it can read or write 32 bit at a time. and this is called align. if the data bus starts from register 6, to complete 32 bit it required 2 cycles(One cycle for 6,7 and another for 8,9).  0,1,2,3 can be read at a time, 4567 can be read at a time. So to read or write 32-bit data at a time we need to make sure our data is in alignment form and RISC architecture does that.

A normal processor like 8086 support both aligned and misaligned data. But in terms of performance aligned required one cycle and misaligned required 2 cycles. Hence ARM is performance-based it doesn't support misaligned data. Everything in the processor you want to store and fetch is started with 0 or 4 or 8 or C or multiple of 4 i.e in aligned. So that you can do the operation in one cycle.

4. Every instruction is of the same size i.e 32 bit. Hence the data bus is also 32 bit so to fetch each instruction it need only one cycle which increases the performance of the processor. this is a RISC characteristic. there is two different architecture RISC and CISC. CISC is flexibility oriented where RISC is performance-oriented.

5. Again It has a 32-bit address bus before we talked about the data bus here the address bus is also 32 bit. Coincidentally there are the same but they are nothing to relate with each other. So from the size of the address bus, we can figure out the size of the memory. If it is n bit address bus we can reach up to 2^n addresses which means ARM can address up to 2^32 =4GB memory location.

6. ARM is based on the Von-Neumann Model. Which say that all program and data is to be stored in one memory. But there is another concept called the Harvard model that says there is separate memory for both program and data. 8051 is based on the Harvard model i.e 64KB for data memory and 64KB for program memory. but in ARM there is one memory of 4GB to store both program(Instruction) and data.

7. Next is it has 3 Stage pipelining(Fetch-Decode-Execute). Fetch the first instruction in one cycle, then decode the fetching instruction and fetch the next instruction in one cycle. Now execute the decoded instruction and decode the fetching instruction in one cycle and also fetch the 3rd instruction in the same cycle. It is only possible when each of the three only needs one cycle for its operation. Then only we can fetch, decode, and execute 3 different instructions in one cycle. It gives better performance. To know more details read the 3 stages Pipelining concept of ARM.

8. ARM has 37 registers of each 32bit. 16 register available at any point in time(R0-R15).

Why ARM need to have that many Registers?

ARM is called load and store model. i.e It says that the only things you need to do with memory are load and store. all the operations are done in registers. In 8051, it supports both memory and register. you can do addition, subtraction, and all other operation in the register and also in memory. But in ARM there is no operation happening inside memory the only is support load and store. You can read the data from memory and write the data to the memory nothing else you can do with memory in the ARM Processor. If you want to do any operation with the data first you need to load the data into the register then do whatever you want to do the operation then store the result in memory. That's how ARM load and store model work.

9. ARM has 7 operating modes. 

1. User Mode
2. Fast Interrupt Request Mode
3. Interrupt Request Mode
4. Supervisor Mode
5. Abort Mode
6. Undefined Mode
7. System Mode

When you switch ON, it is in supervisor mode. then it gets into user mode. To make a system call, it goes to system mode. If it got a normal interrupt then it goes to IRQ mode, If it got the first interrupt, then it goes to FRQ mode. There are two error modes called abort and undefined mode.

10. ARM has 7 interrupts. 

1. Reset
2. Undefined Instruction 
3. Software Interrupt 
4. Prefetch Abort 
5. Data Abort 
6. IRQ (Normal Interrupt) 
7. FIQ (Fast Interrupt)

Interrupt makes the change in operating modes. 7 interrupts make the ARM to go into 5 different operating modes. user and system mode doesn't require any interrupt.

11.  There are 7 addressing modes. 

1. IMMEDIATE ADDRESSING MODE
2. REGISTER ADDRESSING MODE
3. DIRECT ADDRESSING MODE
4. REGISTER INDIRECT ADDRESSING MODE
5. REGISTER RELATIVE INDIRECT ADDRESSING MODE
6. BASE INDEXED INDIRECT ADDRESSING MODE 
7. BASE WITH SCALED REGISTER INDIRECT ADDRESSING MODE 

Addressing mode is the manner in which the operand is giving instruction.